SR ASIC Design Engineer - Networking/ DPU/ AI Systems

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE TEAM:Our group, NTSG, develops advanced system solutions that combine ASIC, hardware, and software to enable next-generation AI networking workloads. We are building highly integrated, high-performance networking systems and are looking for experienced ASIC engineers to help drive development from architecture through production. THE ROLE:We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development cycle - from RTL architecture and design through tapeout, silicon bring-up, and mass production.THE PERSON:We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development cycle - from RTL architecture and design through tapeout, silicon bring-up, and mass production. KEY RESPONSIBILITIES:Architect and design key blocks for next-generation DPU ASICs targeting AI networking workloadsContribute across the full ASIC development lifecyclearchitecture definitionmicroarchitecture and RTL designdesign reviewsimplementation supporttapeoutsilicon bring-upproduction ramp and mass deployment supportCollaborate on advanced network processing engines, including P4-based, protocol-independent packet processing solutionsDesign and implement high-speed, complex ASIC blocks for networking and data movement applicationsWork closely with verification, modeling, software, and hardware teams to ensure functional correctness and system-level performanceDebug and resolve issues across simulation, emulation, lab bring-up, and post-silicon phasesContribute to performance, power, and area optimizationSupport integration of ASIC IPs into larger SoC and system architecturesProduce high-quality design documentation and participate in technical reviewsREQUIRED QUALIFICATIONS:Seasoned ASIC design experienceProven hands-on experience developing high-speed, complex ASICsStrong experience across the complete ASIC development cycle, from RTL architecture to tapeout to mass productionSolid background in networking and packet-processing architecturesExperience collaborating across:VerificationModelingSoftwareHardware/system teamsStrong RTL design skills in:VerilogSystemVerilog Strong programming skills in:C/C++Scripting experience in:PythonTclShellPREFERRED QUALIFICATIONS:Experience designing complex ARM- or RISC-V-based SoC ASICsHands-on experience building complex Network-on-Chip (NoC) architecturesStrong knowledge of AXI / AMBA protocolsFamiliarity with P4, programmable packet-processing pipelines, or protocol-independent networking architecturesExperience with post-silicon debug, bring-up, and production supportExperience with high-performance interconnect, data movement, and SoC integrationSelf-motivated engineer with strong ownership and execution skillsStrong problem-solving ability and willingness to take on new technical challengesContinuous learner who thrives in a fast-moving environmentExcellent communication and cross-functional collaboration skills ACADEMIC CREDENTIALS:Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field LOCATION:Santa Clara, CA #LI-BW1 #LI-hybrid This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.