Senior Validation Engineer

Job Title: - Senior Validation Engineer

Location:- San Jose, CA

Role Type: - 6+ Months Contract

Job Description:

• In this role, this engineer will be part of a highly technical team that develops test plans, completes functional & electrical validation, & debugs issues for new processor silicon interface features with strong focus on power management.
• Writes comprehensive electrical & functional test plans for the processor interface validation of processors.
• Executes electrical & functional test plans for client processors using hardware & software validation tools, oscilloscopes, & logic analyzers.
• Debug of electrical & functional issues for new processors.
• Provides detailed input into the platform definition & review of platform designs used in the silicon validation of new processors.
• Provides technical guidance and training to less experienced engineers and technicians in the planning, test, & debug processor validation.

EXPERIENCE AND EDUCATION:

• Bachelors in electrical engineering or computer engineering with 8-10 years of related experience; or master’s plus at least 2 years directly related experience (an advanced degree will be considered a plus);
• Requires experience and demonstrated technical expertise in the development & execution of platform level electrical & functional test plans; Platform level electrical characterization experience with processor I/O interfaces is considered,
• Preferred.
• Requires experience and demonstrated technical expertise in the debug of processor & PC platform I/O interfaces.
• Demonstrated experience with or knowledge using oscilloscopes, reading schematics and layout documentation, and MS Windows and Office applications.
• Requires good written and oral communication skills.
• Demonstrate the ability to communicate with a variety of engineering disciplines and management.