FPGA Development Engineer

Job Requirements Jessup, MD Arlington, VA Top Secret/SCI Full Scope Polygraph Mid Level Career (5+ yrs experience) Salary not specified Join Premium to unlock estimated salaries Job Description Location: Arlington, VA (HQ2) or Jessup, MD Clearance: Active TS/SCI with polygraph required Citizenship: US Citizen required Scope of Work Design, develop, and integrate FPGA-based systems supporting AWS infrastructure. The contractor will develop custom RTL for 100G+ networking solutions, integrate third-party IP libraries, and collaborate with cross-functional hardware/software teams to deliver scalable, high-performance digital logic. Key Responsibilities Develop and debug custom RTL (SystemVerilog/Verilog/VHDL) targeting advanced FPGA platforms Architect and implement 100G+ networking solutions on FPGA Develop hardware/software interfaces including drivers and software examples Synthesize, implement, and verify timing closure on target devices Participate in design reviews and architectural trade-off discussions Deploy and debug RTL on hardware targets Required Qualifications BS in Electrical Engineering or related field 5+ years FPGA development experience (VHDL, SystemVerilog, or Verilog) 5+ years system design/architecture experience Proficiency in RTL coding, simulation, debug, and performance/power/area trade-offs Knowledge of IT system hardware and networking concepts Active TS/SCI with polygraph (US Citizen) Preferred Qualifications MS in Electrical or Communications Engineering 7+ years full RTL development lifecycle experience Experience with Xilinx Ultrascale+/Versal ACAPs and/or Intel Agilex SOCs Experience with 100G+ networking systems group id: 91164107 N Name Hidden Recruiter Apply now