Job Description As an FPGA Design Engineer, you will play a crucial role in developing a mission-critical communication system for Canada's next-generation fleet of protection vessels. Your work will ensure these ships maintain secure and reliable communications under any conditions. You will collaborate with a multi-disciplinary design team to design, develop, simulate, and integrate complex FPGA solutions tailored to specific project requirements. Responsibilities
- Create FPGA models by transforming RTL designs using synthesis, partitioning, and routing tools.
- Develop, integrate, test, and debug hardware and software in both simulation and FPGA environments.
- Write tests, develop test environments, and support the verification of hardware, software, and firmware.
- Develop and use automation tools, flows, and scripts to enhance FPGA utilization.
- Utilize FPGA design tools to fit designs, close timing, and improve fitting quality.
- Contribute ideas to advance FPGA development processes.
- Design, implement, integrate, and test digital systems with a focus on FPGA technology.
- Create Verilog, VHDL, HDL, and graphical designs for FPGAs.
- Integrate manufacturer IP FPGA cores, such as processors, ADCs, and DACs, into custom firmware architectures.
- Design and validate testbench routines for simulating FPGA designs and sub-designs.
- Integrate firmware with target hardware, ensuring compatibility with system components and software.
- Generate timing constraints for IP blocks and perform Static Timing Analysis.
- 7+ years of FPGA design experience and capable of performing FPGA verification, UVM is a strong asset.
- Experience using AXI protocol, particularly in high-speed communication.
- Experience working on UltraScale devices, ideally Zynq.
- Must be eligible for Secret clearance.
- Bonus points for knowledge of digital audio signal processing.
- Bachelors degree or higher in Electrical Engineering, Computer Engineering, or related field.
- Experience with design isolation is an asset.
- Understanding of Static Timing Analysis and Timing Closure techniques.
- FPGA project documentation knowledge, such as Block Diagram and FSM Design, is an asset.
- Knowledge of UVM functional simulation.
- Knowledge of MPSoC devices.
- Design, build, and test scripting experience using TCL and Python.
- Experience with hardware debugging tools like logic analyzers, oscilloscopes, and JTAG.
- Experience with GIT pipelines is an asset.
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About ActalentActalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 30,000 consultants and more than 4,500 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing winner for both client and talent service.
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